112GHz Frequency Doubler with High Output Power and Fundamental Rejection
○Ibrahim Abdo,Korkut Kaan Tokgoz,藤村 拓弥,岡田 健一,松澤 昭(東京工業大学)
In the near future, wireless communication systems that can achieve data-rates higher than 100Gbps will be needed. One very important part of these systems is the LO signal generation circuit. Considering the very high frequency of the LO signal in the high data rate systems, frequency multipliers that operate at W-band frequencies and above are required. This poster presentation introduces a CMOS 112GHz frequency doubler with high output power of 5.5dBm that can be used in future communication systems.