電子情報通信学会ソサイエティ大会講演要旨
A-6-1
Parameter Embedding for FPGA Implementation of Binarized Neural Networks
◎Reina Sugimoto・Nagisa Ishiura(Kwansei Gakuin Univ.)
A binarized neural network (BNN) is a restricted type of neural network where weights and activations are binary, which enables compact hardware implementation. Although many efficient architectures have been proposed, they assume the weights and biases are stored in on-chip RAMs. This paper presents an attempt to embed those parameters into processing elements by utilizing LUTs in FPGAs an ROMs.